Featured image: A representative silicon wafer, not one of Intel’s reported High-NA production wafers. Photo: Laura Ockel / Unsplash.
Intel has a new number for the argument about its manufacturing future: more than one million wafers processed with High-NA EUV lithography.
In a joint announcement on 7 September 2026, Intel and equipment maker ASML said the technology had crossed that milestone through a mixture of tool qualification, research and development, and production work. They also said Intel was using it for selected layers in a subset of its Panther Lake processors, sold as Core Ultra Series 3. Intel and ASML’s announcement
That is a meaningful step beyond having an impressive machine in a cleanroom. It supplies evidence of repeated use. It does not mean Intel has shipped a million High-NA chips, or that a million saleable production wafers passed through the process.
Sharper optics for smaller features
Lithography prints patterns onto silicon wafers. Those patterns help define the extraordinarily small structures that eventually become transistors and connections.
EUV stands for extreme ultraviolet, the type of light used. High-NA changes the optical system’s numerical aperture—a measure related to its ability to resolve fine detail—from 0.33 to 0.55. It still uses light with a wavelength of 13.5 nanometres. The improvement comes from the optics, rather than from switching to an even shorter wavelength. ASML’s technical explanation
One attraction is the possibility of printing difficult patterns with fewer manufacturing steps. Every additional step can bring expense, complexity and opportunities for defects. But an optical improvement does not automatically translate into the same percentage improvement in a finished processor’s speed or battery life. imec’s assessment of High-NA manufacturing
A manufacturing lead needs more than one tool
Intel and ASML say performance in areas such as alignment, throughput and availability is meeting their expectations. Their statement also describes High-NA results on selected Intel 18A layers as meeting or exceeding comparable conventional EUV results. These are the partners’ assessments; the announcement does not supply a complete independent comparison of manufacturing costs or chip yields against TSMC. Joint manufacturing update
Yield is the proportion of manufactured chips that meet the required standard. A manufacturer can produce a technically impressive design and still struggle if too few working chips emerge from each expensive wafer.
That distinction is central to the competition. Customers need acceptable yields, dependable delivery, design tools and a commercial arrangement that makes sense. Being early with equipment can create learning advantages, but the equipment is only one part of that package.
The broader process also requires new materials, masks, measurements and design choices to work together. Research organisation imec emphasises this coordinated development in its assessment of High-NA adoption. imec on the surrounding manufacturing ecosystem
The pressure on TSMC is real; the verdict is premature
Our interpretation is that Intel’s announcement strengthens its credibility as a manufacturing challenger. Repeatedly operating an advanced tool gives it experience that a roadmap alone cannot provide. The test is whether that experience becomes attractive production technology for customers.
This complements the longer-term discussion in our Intel 14A and TSMC A14 comparison. Neither a node name nor a wafer milestone is a complete ranking of a foundry—the business that manufactures chips for other designers.
Intel has offered a stronger piece of evidence for its comeback. To turn that into a competitive victory, it must show what buyers ultimately purchase: working chips, delivered consistently, at a cost they can accept.
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